The growth of III-V material on Si has been recognized as a highly desirable technology goal for a number of years. The earliest work focused on gallium arsenide (GaAs) solar cells because they were very large area devices where the substrate cost, maximum substrate size, ruggedness and weight (for space applications) were major obstacles for conventional GaAs homoepitaxial approaches. Si substrates provided an attractive solution to all of the above problems. In addition, the alloy composition of AlGaAs can be adjusted to provide an optimum bandgap and absorption match to Si for high efficiency multiple bandgap solar cells. Early efforts attempted the growth of GaAs directly on both single and polycrystal Si, but with very little success. This was not a surprising result because of the expected heteroepitaxial problems created by a 4% lattice mismatch, large thermal expansion mismatch and polar/non-polar interface with antiphase disorder, cross doping and phase segregation. These initial efforts then evolved into a variety of approaches utilizing refractory metals, Ge or Si-Ge graded layers with subsequent growth of GaAs. These structures still faced the polar/non-polar interface problems. While reasonably efficient GaAs on Ge single crystal cells were realized, the results with various interfacial layers on Si were not too encouraging.
About 1981, the potential advantages of large-size wafers, optical interconnects, opto-electronic integrated circuits (OEIC) and monolithic integration of ultra-high speed GaAs with high density Si VLSI pushed a re-examination of the earlier difficulties of direct GaAs/Si heteroepitaxy. There were three key results which have greatly changed the outcome from the prior failures. First was the ability to achieve a clean (relatively O and C free) Si surface. Second was the separation of the nucleation and growth phases in the two-step growth process. Third was the role of tilting the substrate off the direct [100] orientation to form an array of even atomic layer steps in the Si surface to eliminate formation of anti-phase domains. The results of these breakthroughs have made GaAs or other III-V materials on Si increasingly promising from the device and IC perspective.
Recently, nearly all types of GaAs and other III-V heterojunction devices have been demonstrated in GaAs/Si by using molecular beam epitaxy (MBE) or organometallic chemical vapor deposition (OMCVD). For some applications, the device performances are comparable to conventional GaAs approaches, while for others, especially for optical devices, they are still inferior.
One problem encountered in the deposition of III-V material is the difficulty in preventing III-V/Si interfacial contamination during the formation of the nucleation layer. Another problem, particularly in the OMCVD process, is the rough surface morphology resulting from the relatively high substrate temperatures required to efficiently deposit the nucleation layer. Thus, a need exists for a method by which a gallium arsenide or phosphide-containing nucleation layer can be quickly deposited on a surface with the resulting device having a smooth surface morphology and a low level of impurities.